Scientists craft a super-smooth, single-crystal gate for ultralow-power 2D chips, unlocking a future of picowatt logic.

A research team from the National University of Singapore and Nexstrom has created a breakthrough in semiconductor fabrication. They've developed a method to produce a wafer-scale, single-crystal layer of anatase titanium dioxide—a "high-κ dielectric"—and perfectly fuse it with atomically thin 2D semiconductors using a gentle van der Waals integration process. This pristine, defect-free interface is the key achievement.

For engineers and the future of computing, this means transistors built with this technique operate with exceptional efficiency. The transistors demonstrate performance near the fundamental physical limits, with virtually no hysteresis (memory effect) and can be configured as both n-type and p-type devices. This enables the creation of Complementary Field-Effect Transistors (CFETs) for logic circuits that consume less than one picowatt of static power while maintaining high gain and noise tolerance. The takeaway: this is a foundational materials science advance that brings energy-sipping 2D semiconductor electronics—crucial for next-generation wearables, IoT sensors, and AI hardware—closer to reality.